NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, we are driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. 

NXP Semiconductors Austin, TX, USA
Mar 16, 2018
Internship
This position is in NXP’s Automotive business unit, which offers sensor and processing technology that drives all aspects of the secure connected cars of today and the autonomous cars of tomorrow. You will be part of the ESD team, which develops and deploys ElectroStatic Discharge (ESD) solutions in advanced new CMOS process technologies.  Job Responsibilities: Assist senior ESD team with device testing, modelling and circuit optimization to achieve robust IO/ESD solutions in an advanced CMOS process technology. Test Vehicle Review - Includes review of product application requirements, overall ESD protection devices/strategies, compact model features/limitations, and the specific ESD device/circuit test structure design as implemented on the Test Vehicle. TLP/Bench Characterization – Utilize our state-of-the-art TLP/vfTLP tester and bench measurement tools to characterize the ESD device and circuit structures. Compare structures based on a series of performance metrics. SPICE Simulations – Tune compact models to best fit each of the measured diode and clamp options. Compare measurement and simulation results from test circuits to gauge clamp predictive capability in SPICE and relative performance/area in real I/O library applications. Summary Report – Prepare a project report which summarizes measurement and simulations results. Present result to senior management.  Job Qualifications: This position requires a good understanding of CMOS IC design. The candidate should have a strong background in semiconductor device physics and a keen understanding of ESD relevant parasitic devices and latch-up phenomena. A BSEE (or BS Physics) is required, but an MS is preferred. A background in analog and digital circuit simulation with SPICE is preferred. Some experience with design and characterization for system level ESD/EFT events would be ideal, but is not required. A good working knowledge of IC design/layout/verification tools is preferred. The candidate should be a motivated self-starter and will be expected to demonstrate very good communication, collaboration and organizational skills. Only students returning to classes at the end of the internship term will be considered. If you are graduating in December or May, please look for “Entry Level” or “Graduate Hire” positions.  NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.